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LTC1655 16-Bit Rail-to-Rail Micropower DAC in SO-8 Package
FEATURES
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DESCRIPTIO
16-Bit Monotonicity Over Temperature Deglitched Rail-to-Rail Voltage Output SO-8 Package 5V Single Supply Operation ICC(TYP): 600A Internal Reference Maximum DNL Error: 1LSB Power-On Reset 3-Wire Cascadable Serial Interface Low Cost
The LTC(R)1655 is a rail-to-rail voltage output, 16-bit digital-to-analog converter (DAC) in an SO-8 package. It includes an output buffer and a reference. The 3-wire serial interface is compatible with SPI/QSPI and MICROWIRETM protocols. The CLK input has a Schmitt trigger that allows direct optocoupler interface. The LTC1655 has an onboard 2.048V reference that can be overdriven to a higher voltage. The output swings from 0V to 4.096V when using the internal reference. The typical power dissipation is 3.0mW on a single 5V supply. The LTC1655 is pin compatible with Linear Technology's 12-bit VOUT DAC family, allowing an easy upgrade path. It is the only buffered 16-bit DAC in an SO-8 package and it includes an onboard reference for stand alone performance.
, LTC and LT are registered trademarks of Linear Technology Corporation. MICROWIRE is a trademark of National Semiconductor Corporation.
APPLICATIO S
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Digital Calibration Industrial Process Control Automatic Test Equipment Cellular Telephones
TYPICAL APPLICATIO
Functional Block Diagram: 16-Bit Rail-to-Rail DAC
4.5V TO 5.5V 8 VCC 2 DIN 1 CLK P 3 CS/LD 16-BIT SHIFT REG AND DAC LATCH 16 16-BIT DAC REF 2.048V 6 REF
DNL ERROR (LSB)
+ -
VOUT
7
RAIL-TO-RAIL VOLTAGE OUTPUT (0V TO 4.096V)
4 DOUT POWER-ON RESET GND 5
1655 TA01
TO OTHER DACS
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Differential Nonlinearity vs Input Code
1.0 0.8 0.6 0.4 0.2 0 - 0.2 - 0.4 - 0.6 - 0.8 - 1.0 0 16384 32768 CODE 49152 65535
1655 TA02
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1
LTC1655 ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER I FOR ATIO
TOP VIEW CLK 1 DIN 2 CS/LD 3 DOUT 4 N8 PACKAGE 8-LEAD PDIP 8 7 6 5 VCC VOUT REF GND
VCC to GND .............................................. - 0.5V to 7.5V TTL Input Voltage .................................... - 0.5V to 7.5V VOUT, REF ....................................... - 0.5V to VCC + 0.5V Maximum Junction Temperature ......................... 125C Operating Temperature Range LTC1655C .............................................. 0C to 70C LTC1655I........................................... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC1655CN8 LTC1655IN8 LTC1655CS8 LTC1655IS8 S8 PART MARKING 1655 1655I
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 125C, JA = 100C/W (N8) TJMAX = 125C, JA = 150C/W (S8)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VCC = 4.5V to 5.5V, VOUT unloaded, REF unloaded, TA = TMIN to TMAX, unless otherwise noted.
SYMBOL DAC Resolution Monotonicity DNL INL ZSE VOS VOSTC Differential Nonlinearity Integral Nonlinearity Zero Scale Error Offset Error Offset Error Tempco Gain Error Gain Error Drift Power Supply VCC ICC Positive Supply Voltage Supply Current Short-Circuit Current Low Short-Circuit Current High Output Impedance to GND Output Line Regulation AC Performance Voltage Output Slew Rate Voltage Output Settling Time Digital Feedthrough Midscale Glitch Impulse DAC Switch Between 8000 and 7FFF (Note 3) (Note 3) to 0.0015% (16-Bit Settling Time) (Note 3) to 0.012% (13-Bit Settling Time)
q q q
PARAMETER
CONDITIONS
MIN 16 16
TYP
MAX
UNITS Bits Bits
Guaranteed Monotonic (Note 2) REF = 2.2V (External) (Note 2) Measured at Code 200, REF = 2.2V (External) REF = 2.2V (External)
q q q q
0.3 8 0 0.5 5 5 0.5
1.0 20 3 3 16
V/C LSB ppm/C 5.5 V A mA mA mV/V
q
For Specified Performance 4.5V VCC 5.5V (Note 4) VOUT Shorted to GND VOUT Shorted to VCC Input Code = 0 Input Code = 65535, VCC = 4.5V to 5.5V, with Internal Reference
q q
4.5 600 70 80 40
1200 120 140 120 3
Op Amp DC Performance
q q q q
0.3
0.7 20 10 0.3 12
2
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LSB LSB mV mV V/s s s nV -s nV-s
W
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WW
W
LTC1655
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VCC = 4.5V to 5.5V, VOUT unloaded, REF unloaded, TA = TMIN to TMAX, unless otherwise noted.
SYMBOL Digital I/O VIH VIL VOH VOL ILEAK CIN Switching t1 t2 t3 t4 t5 t6 t7 t8 t9 DIN Valid to CLK Setup DIN Valid to CLK Hold CLK High Time CLK Low Time CS/LD Pulse Width LSB CLK to CS/LD CS/LD Low to CLK DOUT Output Delay CLK Low to CS/LD Low Reference Output Voltage Reference Input Range Reference Output Tempco Reference Input Resistance Reference Short-Circuit Current Reference Output Line Regulation Reference Load Regulation VCC = 4.5V to 5.5V IOUT = 100A REF Overdriven to 2.2V
q q q q
PARAMETER Digital Input High Voltage Digital Input Low Voltage Digital Output High Voltage Digital Output Low Voltage Digital Input Leakage Digital Input Capacitance
CONDITIONS
q q
MIN 2.4
TYP
MAX
UNITS V
0.8 VCC - 1 0.4 10 10
V V V A pF ns ns ns ns ns ns ns
IOUT = - 1mA, DOUT Only IOUT = 1mA, DOUT Only VIN = GND to VCC (Note 6) VCC = 5V VCC = 5V VCC = 5V (Note 6) VCC = 5V (Note 6) VCC = 5V (Note 6) VCC = 5V (Note 6) VCC = 5V (Note 6) VCC = 5V, CLOAD = 15pF VCC = 5V (Note 6)
q q q
q q q q q q q q q
40 0 40 40 50 40 20 0 20 2.036 2.2 5 8.5 13 40 100 1.5 0.5 2.048 2.060 VCC /2 120
ns ns V V ppm/C k mA mV/V mV
Reference Output
q
(Notes 5, 6)
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Nonlinearity is defined from code 128 to code 65535 (full scale). See Applications Information. Note 3: DAC switched between all 1s and code 400.
Note 4: Digital inputs at 0V or VCC. Note 5: Reference can be overdriven (see Applications Information). Note 6: Guaranteed by design. Not subject to test.
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LTC1655 TYPICAL PERFORMANCE CHARACTERISTICS
Differential Nonlinearity
1.0
DIFFERENTIAL NONLINEARITY (LSB)
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 16,384 49,152 32,768 DIGITAL INPUT CODE 65,535
1655 G01
INTEGRAL NONLINEARITY (LSB)
1 0 -1 -2 -3 -4 -5 0 16,384 49,152 32,768 DIGITAL INPUT CODE 65,535
1655 G02
VCC - VOUT (V)
Minimum Output Voltage vs Output Sink Current
1.0 CODE: ALL 0's
OUTPUT PULL-DOWN VOLTAGE (V)
FULL-SCALE VOLTAGE (V)
0.8
OFFSET (mV)
0.6 125C 0.4 25C 0.2 -55C
0 0
10 5 OUTPUT SINK CURRENT (mA)
Supply Current vs Logic Input Voltage
3.4 3.0
SUPPLY CURRENT (mA)
SUPPLY CURRENT (A)
2.6 2.2 1.8 1.4 1.0 0.6 0.2 0 1 3 4 2 LOGIC INPUT VOLTAGE (V) 5
1655 G07
4
UW
1655 F04
Integral Nonlinearity
5 4 3 2
1.0 0.8 1.2
Minimum Supply Headroom for Full Output Swing vs Load Current
VOUT < 1LSB VOUT = 4.096V CODE: ALL 1's
125C 0.6 25C 0.4 0.2 0 0 -55C
10 5 LOAD CURRENT (mA)
15
1655 F03
Full-Scale Voltage vs Temperature
4.10
1.0 0.8 0.6
Offset vs Temperature
4.09
0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
4.08
15
4.07 -55
-25
5 35 65 TEMPERATURE (C)
95
125
1655 G05
-1.0 -55
-10 80 35 TEMPERATURE (C)
125
1655 G06
Supply Current vs Temperature
700 680 660 VCC = 5.5V 640 620 600 580 -55 -35 -15 VCC = 5V
VCC = 4.5V
5 25 45 65 85 105 125 TEMPERATURE (C)
1655 G08
LTC1655
PIN FUNCTIONS
CLK (Pin 1): The TTL Level Input for the Serial Interface Clock. DIN (Pin 2): The TTL Level Input for the Serial Interface Data. Data on the DIN pin is latched into the shift register on the rising edge of the serial clock and is loaded MSB first. The LTC1655 requires a 16-bit word. CS/LD (Pin 3): The TTL Level Input for the Serial Interface Enable and Load Control. When CS/LD is low the CLK signal is enabled, so the data can be clocked in. When CS/LD is pulled high, data is loaded from the shift register into the DAC register, updating the DAC output. DOUT (Pin 4): Output of the Shift Register. Becomes valid on the rising edge of the serial clock and swings from GND to VCC. GND (Pin 5): Ground. REF (Pin 6): Reference. Output of the internal reference is 2.048V. There is a gain of two from this pin to the output. The reference can be overdriven from 2.2V to VCC/2. When tied to VCC/2, the output will swing from GND to VCC. The output can only swing to within its offset specification of VCC (see Applications Information). VOUT (Pin 7): Deglitched Rail-to-Rail Voltage Output. VOUT clears to 0V on power-up. VCC (Pin 8): Positive Supply Input. 4.5V VCC 5.5V. Requires a bypass capacitor to ground.
TI I G DIAGRA
t9 t7 CLK 1
DIN
CS/LD
DOUT
D15 PREVIOUS WORD
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t1 t2 2 t4 t3 3 15 16 t6
D15 MSB
D14
D13
D1
D0 LSB t5
t8 D14 PREVIOUS WORD D13 PREVIOUS WORD D0 PREVIOUS WORD D15 CURRENT WORD
1655 TD
5
LTC1655
DEFI ITIO S
Differential Nonlinearity (DNL): The difference between the measured change and the ideal 1LSB change for any two adjacent codes. The DNL error between any two codes is calculated as follows: DNL = (VOUT - LSB)/LSB Where VOUT is the measured voltage difference between two adjacent codes. Digital Feedthrough: The glitch that appears at the analog output caused by AC coupling from the digital inputs when they change state. The area of the glitch is specified in (nV)(sec). Full-Scale Error (FSE): The deviation of the actual fullscale voltage from ideal. FSE includes the effects of offset and gain errors (see Applications Information). Gain Error (GE): The difference between the full-scale output of a DAC from its ideal full-scale value after offset error has been adjusted. Integral Nonlinearity (INL): The deviation from a straight line passing through the endpoints of the DAC transfer curve (Endpoint INL). Because the output cannot go below zero, the linearity is measured between full scale and the lowest code that guarantees the output will be greater than zero. The INL error at a given input code is calculated as follows: INL = [VOUT - VOS - (VFS - VOS)(code/65535)]/LSB Where VOUT is the output voltage of the DAC measured at the given input code. Least Significant Bit (LSB): The ideal voltage difference between two successive codes. LSB = 2VREF/65536 Resolution (n): Defines the number of DAC output states (2n) that divide the full-scale range. Resolution does not imply linearity. Voltage Offset Error (VOS): Nominally, the voltage at the output when the DAC is loaded with all zeros. A single supply DAC can have a true negative offset, but the output cannot go below zero (see Applications Information). For this reason, single supply DAC offset is measured at the lowest code that guarantees the output will be greater than zero.
OPERATIO
Serial Interface
The data on the DIN input is loaded into the shift register on the rising edge of the clock. The MSB is loaded first. The DAC register loads the data from the shift register when CS/LD is pulled high. The clock is disabled internally when CS/LD is high. Note: CLK must be low before CS/LD is pulled low to avoid an extra internal clock pulse. The input word must be 16 bits wide. The buffered output of the 16-bit shift register is available on the DOUT pin which swings from GND to VCC. Multiple LTC1655s may be daisy-chained together by connecting the DOUT pin to the DIN pin of the next chip while the clock and CS/LD signals remain common to all chips in the daisy chain. The serial data is clocked to all of
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the chips, then the CS/LD signal is pulled high to update all of them simultaneously. The shift register and DAC register are cleared to all 0s on power-up. Voltage Output The LTC1655 rail-to-rail buffered output can source or sink 5mA over the entire operating temperature range while pulling to within 400mV of the positive supply voltage or ground. The output stage is equipped with a deglitcher that gives a midscale glitch of 12nV-s. At power-up, output stage clears to 0V. The output swings to within a few millivolts of either supply rail when unloaded and has an equivalent output resistance of 40 when driving a load to the rails. The output can drive 1000pF without going into oscillation.
LTC1655
APPLICATIONS INFORMATION
Rail-to-Rail Output Considerations In any rail-to-rail DAC, the output swing is limited to voltages within the supply range. If the DAC offset is negative, the output for the lowest codes limits at 0V as shown in Figure 1b. Similarly, limiting can occur near full scale when the REF pin is tied to VCC /2. If VREF = VCC /2 and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC as shown in Figure 1c. No full-scale limiting can occur if VREF is less than (VCC - FSE)/2. Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur.
VCC
OUTPUT VOLTAGE
VREF = VCC /2
0
OUTPUT VOLTAGE
0V NEGATIVE OFFSET INPUT CODE (b)
1655 F01
Figure 1. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC /2
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W
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VCC
POSITIVE FSE
VREF = VCC /2
OUTPUT VOLTAGE
INPUT CODE (c)
32768 INPUT CODE (a)
65535
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LTC1655
TYPICAL APPLICATIONS
This circuit shows how to use an LTC1655 to make an optoisolated digitally controlled 4mA to 20mA process controller. The controller circuitry, including the optoisolation, is powered by the loop voltage that can have a wide range of 6V to 30V. The 2.048V reference output of the LTC1655 is used for the 4mA offset current and VOUT is used for the digitally controlled 0mA to 16mA current. RS is a sense resistor and the op amp modulates the transistor Q1 to provide the 4mA to 20mA current through this resistor. The potentiometers allow for offset and fullscale adjustment. The control circuitry dissipates well under the 4mA budget at zero scale.
LT (R)1121-5 IN OUT 1F CLK FROM OPTOISOLATED INPUTS DIN CS/LD VCC VREF VOUT
OPTOISOLATORS
CLK DIN CS/LD
500
4N28
8
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An Isolated 4mA to 20mA Process Controller
VLOOP 6V TO 30V 150k 1% 20k
75k 1%
5k
LTC1655
+
LT(R)1077 3k
1k
Q1 2N3440
-
RS 10
5V 10k CLK DIN CS/LD
IOUT
1655 TA03
LTC1655
TYPICAL APPLICATIONS
This circuit shows how to make a bipolar output 16-bit DAC with a wide output swing using an LTC1655 and an LT1077. R1 and R2 resistively divide down the LTC1655 output and an offset is summed in using the LTC1655 onboard 2.048V reference and R3 and R4. R5 ensures that the onboard reference is always sourcing current and never has to sink any current even when VOUT is at full scale. The LT1077 output will have a wide bipolar output swing of - 4.096V to 4.096V as shown in the figure below. With this output swing 1LSB = 125V.
P
TRANSFER CURVE 4.096 R3 100k 1% DIN R5 100k 1%
VOUT
0
32768
- 4.096
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A Wide Swing, Bipolar Output 16-Bit DAC
5V 0.1F
VCC CLK DIN CS/LD LTC1655 GND VREF VOUT R1 100k 1% 5V
+
R2 200k 1% LT1077 VOUT: (2)(DIN)(4.096) - 4.096V 65536
-
R4 - 5V 200k 1%
1655 TA05
65535
9
LTC1655
PACKAGE DESCRIPTION
0.300 - 0.325 (7.620 - 8.255)
0.009 - 0.015 (0.229 - 0.381)
(
+0.035 0.325 -0.015 8.255 +0.889 -0.381
)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
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Dimensions in inches (millimeters) unless otherwise noted.
N8 Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400* (10.160) MAX 8 7 6 5
0.255 0.015* (6.477 0.381)
1
2
3
4 0.130 0.005 (3.302 0.127)
0.045 - 0.065 (1.143 - 1.651)
0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 0.003 (0.457 0.076) N8 1197
0.100 0.010 (2.540 0.254)
LTC1655
PACKAGE DESCRIPTION
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.016 - 0.050 0.406 - 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Dimensions in inches (millimeters) unless otherwise noted.
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 7 6 5
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.053 - 0.069 (1.346 - 1.752)
2
3
4
0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
SO8 0996
11
LTC1655
TYPICAL APPLICATION
This circuit shows a digitally programmable current source from an external voltage source using an external op amp, an LT1077 and an NPN transistor (2N3440). Any digital word from 0 to 65535 is loaded into the LTC1655 and its output correspondingly swings from 0V to 4.096V. In the configuration shown, R1, R2 resistively divide down the LTC1655 output voltage. This divided voltage will be forced across the resistor RA. If RA is chosen to be 205, the output current will range from 0mA at zero scale to 10mA at full scale. The minimum voltage for VS is determined by the load resistor RL and Q1's VCESAT voltage. With a load resistor of 50, the voltage source can be as low as 3.3V.
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RELATED PARTS
PART NUMBER DESCRIPTION LTC1257 LTC1446/ LTC1446L LTC1448 LTC1450/ LTC1450L LTC1451 LTC1452 LTC1453 LTC1454/ LTC1454L LTC1456 LTC1458/ LTC1458L LTC1650 LTC1658 LTC1659 Single 12-Bit VOUT DAC, Full Scale: 2.048V, VCC: 4.75V to 15.75V, Reference Can Be Overdriven Up to 12V, i.e., FSMAX = 12V Dual 12-Bit VOUT DACs in SO-8 Package Dual 12-Bit VOUT DAC, VCC: 2.7V to 5.5V Single 12-Bit VOUT DACs with Parallel Interface Single Rail-to-Rail 12-Bit DAC, Full Scale: 4.095V, VCC: 4.5V to 5.5V, Internal 2.048V Reference Brought Out to Pin Single Rail-to-Rail 12-Bit VOUT Multiplying DAC, VCC: 2.7V to 5.5V COMMENTS 5V to 15V Single Supply, Complete VOUT DAC in SO-8 Package LTC1446: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1446L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V Output Swings from GND to REF. REF Input Can Be Tied to VCC LTC1450: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1450L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V 5V, Low Power Complete VOUT DAC in SO-8 Package Low Power, Multiplying VOUT DAC with Rail-to-Rail Buffer Amplifier in SO-8 Package LTC1454: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1454L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V Low Power, Complete VOUT DAC in SO-8 Package with Clear Pin LTC1458: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1458L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V Low Power, Deglitched, 4-Quadrant Mulitplying VOUT Low Power, Multiplying VOUT DAC in MS8 Package. Output Swings from GND to REF. REF Input Can Be Tied to VCC Low Power, Multiplying VOUT DAC in MS8 Package. Output Swings from GND to REF. REF Input Can Be Tied to VCC
1655f LT/TP 0399 4K * PRINTED IN USA
Single Rail-to-Rail 12-Bit VOUT DAC, Full Scale: 2.5V, VCC: 2.7V to 5.5V 3V, Low Power, Complete VOUT DAC in SO-8 Package Dual 12-Bit VOUT DACs in SO-16 Package with Added Functionality Single Rail-to-Rail Output 12-Bit DAC with Clear Pin, Full Scale: 4.095V, VCC: 4.5V to 5.5V Quad 12 Bit Rail-to-Rail Output DACs with Added Functionality Single 16-Bit VOUT Industrial DAC in 16-Pin SO, VCC = 5V DAC, Output Swing 4.5V Single Rail-to-Rail 14-Bit VOUT DAC in 8-Pin MSOP, VCC = 2.7V to 5.5V Single Rail-to-Rail 12-Bit VOUT DAC in 8-Pin MSOP, VCC = 2.7V to 5.5V
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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Digitally Programmable Current Source
5V 0.1F VCC CLK DIN CS/LD GND LTC1655 VOUT R1 100k 1% R2 100k 1% RL VS + 3.3V TO 100V FOR RL 50 IOUT = (DIN)(4.096) 1 * (65536)(RA) 2 0mA TO 10mA
+
LT1077
-
Q1 2N3440
RA 205 1%
1655 TA04
(c) LINEAR TECHNOLOGY CORPORATION 1998

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